1. Field of the Invention
The present invention relates to a semiconductor memory device, and particularly to a semiconductor memory device having a plurality of signal lines for writing and reading data.
2. Description of the Background Art
In recent years, capacities of semiconductor memory devices such as dynamic random access memories have been increased. As a result, faults may occur in memory cells in a manufacturing step. Also, faults may occur in signal lines such as word lines, bit lines and data lines. In a conventional manner, defects in such signal lines are externally detected by a tester from outside the semiconductor memory device.
In recent years, however, signal lines in semiconductor memory devices have been subminiaturized for increasing capacities of the semiconductor memory devices. According to a fault detecting method using an external tester, therefore, it is difficult to detect faults finely by checking signal lines one by one.
Even when a faulty signal line having a fault is detected, a faulty leak current will continuously flow if the faulty signal line is short-circuited to another line or the like. For example, it is assumed that a global data line pair is precharged to H-level in the write or read operation. If short circuit occurs between paired global data lines, the faulty global data line pair is replaced with a preliminary or spare global data line pair so that it is possible to avoid use of the faulty global data line pair. However, the faulty global data line pair will be continuously precharged. Therefore, the faulty leak current will continuously flow.